LogicWorks 5 for Windows is the leading schematic drawing and interactive digital simulation package setting the standard for demonstrating logic design principles and practices within the education sector and industry.
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LogicWorks (TM) Lab 4. Logic Simulation of Circuits with Feedback. Tutorial Objectives. In this laboratory, you will gain experience in using LogicWorks (TM) to simulate latches, flip-flops, and some simple shift register circuits.
What is LogicWorks for Windows?
LogicWorks is an innovative interactive circuit design tool that allows you to run quick and efficient simulations on screen. It’s the single fastest and most reliable solution to help you learn digital logic. Apart from the power of the software, it comes with unmatched flexibility, enabling you to create and test a virtually unlimited number of circuit elements from your computer. This allows for greater and more efficient learning process and helps you study advanced concepts in shorter time.
- Logicworks is a leading provider of managed cloud and migration services for AWS and Azure.
- Logicworks free download - White Noise Ambience Lite, White Noise Ambience HD Lite, White Noise Ambience, and many more programs.
- Logicworks is a provider of cloud computing, data migration and server hosting solutions for e-commerce and healthcare sectors. Logicworks was founded in 1993. Logicworks' headquarters is located in New York, New York, USA 10001. It has raised 142.6M.
VHDL
LogicWorks users can use a subset of the standards VHDL language to describe and simulate circuits. With this innovative feature, LogicWorks now enables you to mix devices and circuits, described in the form of schematic designs with blocks, described in text using VHDL. See the VHDL page for a more detailed description of the language implementation in this version.
Full Schematic Editing
To enhance your learning process, LogicWorks comes with a full schematic editor, including bussing, multi-level Undo and Redo, interactive connection tracing, and a number of other features. Any change you make to the signal connection or the device parameters will be reflected instantly in the timing waveforms and probes, placed on the diagram.
Upwardly Compatible to DesignWorks
LogicWorks is fully compatible with our professional design package, DesignWorks. You can now have your own copy of Logic works on your Window-based computer and then transfer your designs to DesignWorks for more powerful and efficient integration, analysis and testing.
How do I buy LogicWorks?
Purchase the Windows version of LogicWorks directly from our website.
Software Requirements
- Version 5.8 UWP (current) or newer : Windows 10
- Version 5.6(current) or newer : Windows 7, Windows 8 or Windows 10
Where do I get support for LogicWorks?
Please see our LogicWorks support site for FAQs and support contact information.
What would you like to do?
Objectives
'LogicWorks is an interactive circuit design tool intended for teaching and learning digital logic.' LogicWorks 5 is the newest version of LogicWorks.It is a program that we can use for designing and simulating circuits.
VHDL stands for VHSIC Hardware Description Language. VHSIC means Very High Speed Integrated Circuits.VHDL is an industry-standard language for modeling and synthesizing digital hardware, particularly for programmerable logic or Application SpecificIntegrated Circuits. The VHDL simulation serves as a basis for testing complex designs and validating the design prior to fabrication. As a result,the redesign is reduced, the design cycle is shortened, and the product is brought to market sooner.A VHDL program can be considered as a description of a digital system; the associated simulator will use this description to produce behaviorthat will mimic that of the physical system.
This lab contains the basic structure of VHDL and creating a VHDL model for a device symbol.
1. VHDL Basic Structure
VHDL can be used to describe digital hardware at different levelsof abstraction. It can be used as a tool to enter Boolean equationsand truth tables. Some other techniques will be introduced in the future labs.Entity and Architecture
An
entity declaration and an architecture body are the two very basic constructs that are required by every VHDL file. The entity declaration defines the inputs and outputs of the design. The architecture body defines the relationship between the inputs andthe outputs. Example 1:
For this simple circuitwe can use the following VHDL to describe it.Pay attention to the use of entity declaration and architecture body constructs.
Example 2:
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We have learnt that a 3-input majority detector has the following truth table:The corresponding Boolean function of it isThe following is the VHDL code to describe this 3-input majority detector.2. Create a VHDL Model for a Device Symbol
- Open LogicWorks 5.
- Close any open circuit diagrams or VHDL files if any.
- Go to the File menu and select the New command.
- In the list of available document types, select Model Wizard and click OK.
- For the Source selection, choose 'Create a new, empty model.'
- For the Destination selection, choose 'Create a new symbol with the specified model attached.'
- Click the Next button.
- Select the VHDL model type, and enter a name, such as, majority3
- Click on the Next button to view the 'Port Interface Panel'.
- Set the Functions to Input. if it isn't already.
- Enter the name a as the first input.
- Click Add Single Bit button.
- Enter the name b, and click the Add Single Bit button again to add the second inpuit.
- Enter the name c, and click the Add Single Bit button again to add the third inpuit.
- Go back to the top of the panel and change the Function selection to Output.
- Enter the name y, and click the Add Single Bit button.
- The port list should now look like this:
- Click on the Next button, you should see this panel.
- If desired, move the pins to different locations on the symbol by dragging and dropping names from one box to another.
- Once you are satisfied with the pin locations, click on the Next button, you should see this panel.
- Click on New Lib button to create a new one on your I: drive, for example I:301mylib.
- Once you have selected a library, click on the Finish button.
- Save majority3.dwv model file in the default location, or find a suitable folder for it.
- Select the New command in the File menu; then choose the Circuit item.
This will creat a new, empty circuit window on the screen. - Locate the majority3 part in the parts list on the right hand side of the screen,
and place it in the circuit window, you should see this part: - Double-click on the majority3 device. This will open the the VHDL model in a new window.
- Refer to Example 2 to get the architecture block completed.
- Compile the VHDL Model.
- Close the majority3 document window, once the file is compiled correctly.
- You should now be looking at the circuit containing majority3 symbol again.
The system description is now complete, so we just have to test it. - Connect a binary switch to a, b, c and a binary probe to y
- Change the values for a, b, c and record the values of the y.
Check if it matches the truth table for the 3-input majority testector. - You should have this circuit.
3. Conclusion
By now, you have learned the basic ideas about VHDL with LogicWorks, but there is much more to learn. This lab material is only an introduction to VHDL with LogicWorks 5. More about VHDL will be introduced in the future labs. There are some LogicWorks 5 manuals available. If you want to work through more tutorials in the manual or want to know more, you can ask me during the lab.You may also ask me questions at lab time or at my office hours in CL119. If a lab requires new features, I will explain more within the lab.
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4. Lab Assignments
5. More Info about VHDL
LogicWorks is a trademark of Capilano Computing.
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Copyright: Department of Computer Science, University of Regina.